1. Field of the Invention
The present invention generally relates to optical detector apparatuses for detecting motion. More specifically, the present invention relates to an optical detector apparatus for detecting motion, in which voltage signals having different phases A and B, generated in response to light signals, are converted into binary signals with a high accuracy.
2. Description of the Related Art
FIG. 4A is a circuit diagram of a first conventional detector apparatus. The detector apparatus is used for detecting the distance and direction of motion, for example, rotation of a ball mounted in a mouse apparatus (not shown) which allows inputs to a computer.
The mouse apparatus includes the ball, orthogonal shafts (not shown) rotatably supported and engaged with the ball, encoder disks (not shown) each provided on one end of the associated shaft and each having slits radially formed with a predetermined pitch in a circumferential direction, light emitting devices each opposing one face of the associated encoder disk, and light receiving devices opposing the other face of the associated encoder disk.
When the mouse apparatus is moved, generating rotation of the ball, the shafts rotate in response. Light emitted from each of the light emitting devices provided on one side of the associated encoder disk partially transmits through the slits of the associated encoder disk to reach the light receiving devices provided on the other side of the associated encoder disk.
Referring to FIG. 4A, one of the light emitting devices 2, one of the light receiving devices 3, and wave-shaping circuits 5 and 6 are shown. The light emitting device 2 is typically implemented by a light emitting diode. The light receiving device 3 includes a pair of light receiving elements 3a and 3b each implemented by a phototransistor.
Emitter terminals 3e and 3e′ of the light receiving elements 3a and 3b are connected to the reference voltage R, respectively, via resistors 4 and 4′ having the same value of resistance. The wave-shaping circuits 5 and 6 are provided subsequent to the resistors 4 and 4′.
The wave-shaping circuits 5 and 6 include two binarization circuits 5A and 6A primarily implemented by comparators. The emitter terminals 3e and 3e′ of the light receiving elements 3a and 3b are connected to non-inverting input terminals 5a and 6a of the binarization circuits 5A and 6A, respectively. The emitter terminals 3e and 3e′ of the light receiving elements 3a and 3b are connected via resistors 7 and 7′ having the same value of resistance, and the node 7a between the resistors 7 and 7′ is connected to the reference potential via a capacitor 8. The node 7a is also connected to inverting input terminals 5b and 6b of the binarization circuits 5A and 6A. Output terminals 5c and 6c of the binarization circuits 5A and 6A are connected to the non-inverting inputs 5a and 6a thereof, respectively, via resistors having a predetermined value of resistance, so that positive feedback is provided.
When the light receiving elements 3a and 3b detect light from the light emitting device 2, currents flow in the direction from the collector terminal 3c to the emitter terminals 3e and 3e′. The currents flow through the resistors 4 and 4′ to cause voltage drops, thereby generating a voltage signal Sa of phase A and a voltage signal Sb of phase B. As shown in FIG. 5, the voltage signals form sine waves in synchronization with the light signals received by the light receiving elements 3a and 3b, the amplitudes thereof corresponding to the intensity of the light signals. The voltage signals Sa and Sb have a difference in phase due to the positional difference between the light receiving elements 3a and 3b. For example, if the ball rotates in a first direction, the voltage signal Sb is 90 degrees behind the voltage signal Sa, whereas if the ball rotates in a second direction opposite to the first direction, the voltage signal Sa is 90 degrees behind the voltage signal Sb.
The resistors 7 and 7′ and the capacitor 8 constitute an integral smoothing circuit. The integral smoothing circuit integrally smoothes the voltage signals Sa and Sb together, a voltage obtained by smoothing being input, as a threshold voltage, to the inverting input terminals 5b and 6b of the binarization circuits 5A and 6A. Then, the binarization circuits 5A and 6A convert the voltage signals Sa and Sb input to the non-inverting terminals 5a and 6a into binary signals with reference to the threshold voltage VTH.
For example, the binarization circuit 5A outputs a high-level signal when the voltage signal Sa is larger than the threshold voltage VTH, and outputs a low-level signal when the voltage signal Sa is smaller than the threshold voltage VTH. Accordingly, the voltage signals Sa and Sb are respectively converted into high-or-low binary signals.
FIG. 4B is a circuit diagram of another conventional detector apparatus. As opposed to the detector apparatus shown in FIG. 4A, the binarization circuits 5A and 6A respectively have integral smoothing circuits 9A and 9B. The voltage signals Sa and Sb are integrally smoothed in the integral smoothing circuits 9A and 9B, respectively, to generate threshold voltages VT1 and VT2. The binarization circuits 5A and 6A converts the voltage signals Sa and Sb into binary signal Da and Db with reference to the threshold voltages VT1 and VT2, respectively.
However, the conventional-detector apparatuses suffer the following problems.
The light emitting device 2 and the light receiving device 3 exhibit performance variations due to temperature changes, degradation over time, response characteristics of the light receiving device 3, and difference in dimension and sensitivity between the light receiving elements 3a and 3b. In addition, if the light emitting device 2 and the light receiving device 3 are not mounted at precise positions on a substrate in the mouse apparatus, the characteristics of the voltage signals Sa and Sb are likely to change, causing variations in output signal characteristics.
For example, if the light receiving elements 3a and 3b have quite different characteristics, as shown in FIG. 6, the voltage signal Sa may be positively biased while the voltage signal Sb is negatively biased.
In the conventional detector apparatus shown in FIG. 4A, the mean voltage of the threshold voltage VT1 for the voltage signal Sa and of the threshold voltage VT2 for the voltage signal Sb serves as the threshold voltage VTH for both of the signals. In this case, the voltage signal Sb does not cross the threshold voltage VTH, inhibiting generation of the binary signal Db. That is, if there is a large disparity between the threshold voltage VT1 for the voltage signal Sa and the threshold voltage VT2 for the voltage signal Sb, the voltage signals Sa and Sb are not properly binarized.
In the detector apparatus shown in FIG. 4B, the threshold voltages VT1, and VT2 are obtained by integrally smoothing the respective voltage signals Sa and Sb. Thus, when the voltage signals Sa and Sb are not input, i.e., when the mouse apparatus is not moved, power supply noise, external floating noise, etc. are binarized with reference to the threshold voltages VT1, and VT2 obtained the power supply noise, external floating noise, etc. Thus, the detector apparatus is overly sensitive and detects small disturbances such as the power supply noise, external floating noise, etc., converting undesired signals into binary signals.
Therefore, the conventional detector apparatuses have required complex adjustment on a product-by-product basis in order to avoid component characteristic variations and component displacements and to thereby ensure adequate performance.